Responsibilities

1. High-speed optical communication physical layer analog IC design, including but not limited to low-noise broadband trans-impedance amplifier/TIA, laser driver/LDD, limiting and automatic gain control amplifier (LA/AGC), clock recovery and data adjudication circuit/CDR;
2. Top-level and sub-circuit index classification according to chip product specifications, and design optimization of high-speed and high-frequency circuit modules;
3. Guide layout engineers in the design and optimization of chip layouts;
4. Test chips and analyze circuit problems, and provide solutions.

Requirements

1. Master degree or above in microelectronics related majors;
2. Solid knowledge of analog circuit theory, with high-speed/ RF chip design/ flow experience preferred;
3. Familiar with IC design process, skilled in using relevant EDA design tools;
4. Familiar with the chip testing process, skilled in laboratory testing, familiar with oscilloscopes, spectrometers, and be able to independently complete the performance testing of chips;
5. Good learning ability and teamwork skills.